Conference

CONFERENCE

Curated by engineers, for engineers, DesignCon presents 15 conference tracks that address chip, board, and system challenges facing design engineers.

Technical Sessions, Boot Camps, Panels, and Tutorials are provided for all levels of learning, with information for experienced engineers, recent graduates, and everyone in between.

From foundational to applicational, DesignCon conference areas can be explored by discipline, education level, speaker, and primary or secondary track.

Conference education sessions are available to All-Access, 2-Day, Speaker, Media, and Education pass holders.

All Conference Sessions: Times & Descriptions
All Education by Type/Track
Full DesignCon Schedule at a Glance [PDF]

Keep flipping to DesignCon’s 15 Conference Tracks >>

Track 2: Chip I/O & Power Modeling
Predicting critical aspects of system performance requires accurate sub-systems and component models. This track addresses the creation and validation of silicon, substrates, and component-level models needed for system design and verification.

Track 1: Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Die, chiplet, optic, interposer, breakout, and packaging decisions can make or break a high-performance interface. This track covers a wide variety of signal and power integrity topics at the die, chiplet, interposer, packaging, and system interface levels. This includes SoC issues, multi-chip integration, chiplet ecosystems, CPC/NCP chip and near packaged copper-optical transitions, power delivery networks, related noise and jitter mitigation strategies.

Track 3: Integrating Photonics & Wireless in Electrical Design
Integrating photonics or wireless technology into electrical designs presents unique design challenges at the chip, board, and system level. This track deals with the issues associated with the design and integration of photonics and wireless ICs, 3D packaging involving optical and electrical interconnects for data communication, co-packaged direct drive and retimed optics, and emerging wireless and mmWave applications.

Track 4: Advances in Materials & Processing for PCBs, Modules & Packages
Printed circuit board (PCB) materials and fabrication processes can affect the electrical properties and performance of the PCB’s modules and packages. This track considers those needs and analyzes the various solution options.

Track 5: Advanced Interface Design for Memory/HBM, Chiplet, Multi-die & 3DIC/SiP Integrations
The recent trends in data center, networking, cloud computing, mobile, autonomous driving, machine learning, virtual/augmented reality, and high-performance computing (HPC) present great challenges in interface design. Interface design also needs to meet increased bandwidth requirements while reducing power, cost, form factor, and maintaining or reducing latency. This track addresses the latest design techniques and signal and power integrity solutions to meet these requirements for various designs in areas of memory interface, such as UCIe, 3DIC/SiP, and high-speed chip-to-chip interconnects.

Track 6: System Co-Design: Modeling, Simulation & Measurement Validation
Design-oriented modeling simulation and analysis are required for cost-effective power and signal integrity (SI) performance optimization of chip, package, board, and chip+package+board+VRM combinations. This track covers the broad range of topics required to best address those needs for modern CPU/GPU and digital systems.

Track 7: Optimizing High-Speed Link Design
System designers must resolve a complex set of tradeoffs among package/board/backplane/cable design, choice of connector/materials, SerDes transmit/receive equalization capabilities, and signal coding schemes to get the high-speed serial channels in their system to meet both performance and cost requirements. This track presents system analysis techniques, design studies, and technology/performance data to help system designers make design and technology choices that are as effective as possible.

Track 8: Measurement & Simulation Techniques for Analyzing Jitter, Noise & BER/SER/FLR
High-speed serial system impairments caused by jitter, noise, distortion, crosstalk, and ISI, can translate into bit, symbol, and frame errors. This track covers techniques for reducing errors, BER/SER/FLR (bit/symbol/frame loss ratio) through analysis of measurements, simulations, and models of components, subsystems, and systems.

Track 9: High-Speed Signal Processing, Modulation, Equalization & Coding/FEC
High-speed communication systems require increasingly complex signal-processing techniques, including equalization, modulation, synchronization, timing, detection, and FEC methods. This track covers design, modeling, analysis, implementation, and validation of such techniques.

Track 10: Power Integrity in Power Distribution Networks, Power Supplies & Power Delivery
Power Integrity, distribution, and management are essential for system functionality and performance. This track addresses power regulation in terms of power distribution network design, modeling and analysis on boards, packages, and chips, including thermal and reliability considerations – in HPC, AI, and ML applications, for instance. It emphasizes the modeling and analysis of impedance, supply noise, and/or power induced jitter, and their impact on overall system performance.

Track 11: Electromagnetic Compatibility & Interference
The electromagnetic compatibility (EMC) and interference (EMI) track aims to cover topics related to the electrical modeling, simulation, design, and validation for product compliance and certification due to EMC/EMI issues. This track raises the awareness and the impact for design and systems engineers involved in circuit architecture, supply designs, and interface performance. It looks at power distribution network design, modeling and analysis on boards, packages, and chips in order to mitigate possible issues and improve products in the early design stage.

Track 12: Applying Test & Measurement Methodology
Advancements in measurement techniques are constantly being made for all aspects of signal and power integrity. This track focuses on the new techniques with an emphasis on understanding the practical limitations and quality of the measurement as well as the accuracies involved when trying to match simulations with measurements.

Track 13: Modeling, Analysis & Optimization of Interconnects
Modeling of signals on interconnects with high data rates often requires use or extension of analysis techniques originally developed for RF/microwave systems. This track includes passive link analysis and optimization for industry standards (10G, 28G, 100G, 400G, PCIE, USB, SATA, DDR, UCIe) with the use of electromagnetic and microwave signal integrity analysis techniques as well as validation with measurements.

Track 14: Machine Learning & AI for Microelectronics, Signaling, Multi-physics & System Design
Machine-learning algorithms can efficiently derive models for electronics and system design automation and enable fast, accurate design and verification of microelectronic circuits and systems. Unlike traditional programming approaches that have knowledge embedded in complex algorithms and mathematical models, machine learning uses simple algorithms and models, but with numerous parameters, that are intensively trained with complex data sets. Machine learned generative models cover the entire solution space vs. tradition-discriminative models. This track explores applications where machine-learning approaches provide alternative solutions to traditional methods and offer new solutions to challenging problems. Primary focus will be behavioral models, optimization for electronics design, and system analytics with machine learning techniques.

Drive World – Advanced Automotive
As the design worlds of autonomous vehicle design and electric vehicle design begin to merge, cars are getting smarter and more efficient. The Drive World track covers electric vehicle technology in addition to sessions in the areas of autonomous electronics and intelligence on topics such as accelerating next-gen vehicle design, advanced hydrogen sensing technology for safety enhancement, high-speed automotive PCB digital interconnects, SI for automotive multigigabit applications, test and measurement for automotive standards, BEV vs HEV vs EREV, and EMC/EMI in automotive applications.

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